Field of the Invention
The disclosure generally relates to an ESD (Electrostatic Discharge) protection circuit, and more specifically, to an ESD protection circuit for voltage stabilization.
Description of the Related Art
ESD (Electrostatic Discharge) is the sudden flow of electricity between two electrically charged objects caused by contact, an electrical short, or dielectric breakdown. Manufacturers and users of integrated circuits must take precautions to avoid ESD. ESD prevention can be part of the device itself and include special design techniques for device input and output pins. External protection components can also be used with circuit layout.
For a conventional ESD protection circuit, a coupling path is always formed from an I/O (Input/Output) node to a supply node. When an ESD event occurs, the disturbance at the I/O node may cause another disturbance at the supply node, and it may damage sensitive components coupled to the supply node. Also, other adjacent I/O nodes may be affected by the disturbance through the mutual coupling therebetween. Accordingly, there is a need to propose a novel solution for solving the problem of the prior art.